well that was a bit tricky, but it's more or less laid out now.

Tube🍂Time's posts Post Back to profile

Top-level

Tube🍂Time

Like 11 Nov 2023 at 1:54 | Open on mastodon.social

17 comments

Mike Grusin replied to Tube🍂Time

@tubetime Nice! (And LOLing because I JUST asked a client whether they really need the big teensy or could they go with the smaller one.)

11 Nov 2023 at 3:39 | Open on mastodon.world

doragasu replied to Tube🍂Time

@tubetime Reading the silk screen of your boards is always so much fun! 😂

11 Nov 2023 at 8:19 | Open on mastodon.sdf.org

Tube🍂Time replied to Tube🍂Time

looks like there's a rare problem when reading sectors, around 1 in 100,000 reads. ugh these can be hard to track down

12 Nov 2023 at 2:17 | Open on mastodon.social

Tube🍂Time replied to Tube🍂Time

i thought it might be a timing issue caused by disabling USB debugging, but it still happens (with roughly the same statistics) with USB debugging turned on.

17 Nov 2023 at 15:20 | Open on mastodon.social

Tube🍂Time replied to Tube🍂Time

looks like some individual data bits are getting flipped. what's really odd is that it is repeatable and it seems to be the same bits at the same addresses.

17 Nov 2023 at 15:21 | Open on mastodon.social

Tube🍂Time replied to Tube🍂Time

also -- there seem to be two overlapping bugs. one causes a few bits to be corrupted for single sector reads, the other causes an entire sector's data to be shifted by several bytes.

17 Nov 2023 at 15:22 | Open on mastodon.social

/dev/rdsk/c5t1d0s2 replied to Tube🍂Time

@tubetime SD card’s cursed

17 Nov 2023 at 21:16 | Open on aus.social

Tube🍂Time replied to Tube🍂Time

huh, once I connect the logic analyzer, the problem takes much longer to reproduce; the probability of data corruption drops dramatically. interesting but it makes things much harder to debug.

17 Nov 2023 at 23:59 | Open on mastodon.social

/dev/rdsk/c5t1d0s2 replied to Tube🍂Time

@tubetime hey @azonenberg weren’t you looking for examples of probes changing behavior of the DUT?

18 Nov 2023 at 0:04 | Open on aus.social

Tube🍂Time replied to Tube🍂Time

looks like it is skipping a transfer here somehow. it transfers B66D, then it skips 6DDB and goes to DBB6. the preempt line seems to deassert right before arb/gnt goes high. that doesn't seem right.

18 Nov 2023 at 0:33 | Open on mastodon.social

Jon Dubovsky replied to Tube🍂Time

@tubetime A coincidence that DBB6 == 6DDB << 1 ? Could it be slipping a bit?

18 Nov 2023 at 0:37 | Open on mastodon.social

Tube🍂Time replied to Jon

@jond no that is just the pattern in the disk image. presumably a disk area that was never written to after being formatted and still contains this bit pattern.

18 Nov 2023 at 1:15 | Open on mastodon.social

Tube🍂Time replied to Tube🍂Time

the smoking gun: an invalid bus transfer. both rd and wr are asserted at the same time. before that we see the missing data on the bus: 6DDB. so the card thinks it is in a DMA cycle even though it is not, and it's putting data on the bus when it shouldn't be!