Gregory's ServerThe 8086 chip supports 256 different interrupts. Each one has an entry in a "vector table" pointing to the code that handles that interrupt. The microcode gets the right address from the vector table and does a subroutine call to that handler routine.
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 The external interrupt pins each have a circuit to clean up the interrupt signal and synchronize it to the 8086's clock. An input protection diode, inverters, and a two-stage latch. "Superbuffers" built from two transistors provide more current than regular NMOS buffers. From there, external interrupts go to some logic that prioritizes the interrupts, decides when the system can handle them (usually at the end of an instruction), and signals the microcode to execute the appropriate interrupt code. The INTR pin triggers a complicated interrupt that runs INTA two bus cycles to acknowledge the interrupt (for historical reasons from the 8008 and 8080 processors). The interrupt bus cycle is similar to a memory read but gets an interrupt type value from the external device.  @kenshirriff From the references, the 8008 "interrupt" facility was *wild* (but sort-of clever in a wierd hacked-together way). For lots more details and a microcode walkthrough, see my latest blog post: https://www.righto.com/2023/02/8086-interrupt.html @kenshirriff @hukl amazing what people created back then. Thanks a lot for the insights that remind me that nothing of what we use today, low- or hightech, could exist without a monstrous load of work (and fun, for sure) in the past. |
For a software interrupt, this INTR microcode pushes the flags and gets the interrupt handler address from the vector table. Two adds multiply the interrupt number by 4 to get the table address. The FARCALL2 and NEARCALL routines do a subroutine call to the handler.