From there, external interrupts go to some logic that prioritizes the interrupts, decides when the system can handle them (usually at the end of an instruction), and signals the microcode to execute the appropriate interrupt code.
Top-level
From there, external interrupts go to some logic that prioritizes the interrupts, decides when the system can handle them (usually at the end of an instruction), and signals the microcode to execute the appropriate interrupt code. 4 comments
@kenshirriff From the references, the 8008 "interrupt" facility was *wild* (but sort-of clever in a wierd hacked-together way). For lots more details and a microcode walkthrough, see my latest blog post: https://www.righto.com/2023/02/8086-interrupt.html @kenshirriff @hukl amazing what people created back then. Thanks a lot for the insights that remind me that nothing of what we use today, low- or hightech, could exist without a monstrous load of work (and fun, for sure) in the past. |
The INTR pin triggers a complicated interrupt that runs INTA two bus cycles to acknowledge the interrupt (for historical reasons from the 8008 and 8080 processors). The interrupt bus cycle is similar to a memory read but gets an interrupt type value from the external device.