Gregory's ServerA NOR gate is similar to an inverter but uses more transistors: PMOS transistors in series and NMOS transistors in parallel. Here's 3-input NOR gate schematic and how it appears on the die. 8/20
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 Complex gates such as AND-NOR can be easily constructed in CMOS. Here's one from the chip. Confusingly, another gate is interleaved between the NMOS and PMOS transistors of this gate. 10/20 Another important circuit is the transmission gate, essentially a switch that can let a signal through. It's built from two transistors. 11/20 From two transmission gates, you can build a multiplexer. This circuit selects one of the two inputs. 12/20 The chip has a bunch of multiplexers squished together. It looks like a mess, but you can trace them out. 13/20 The multiplexers and gates form a toggle flip-flop. The details are a bit much to explain here so see my blog post at https://www.righto.com/2024/01/reverse-engineering-cmos.html 14/20 This old chip has a single metal layer and no polysilicon. Thus, it is tricky to route signals so they don't cross. If two signals need to cross, one goes down into the silicon layer and under the metal layer of the other signal. Photos show three examples. 15/20 I think the chip is a 1970s Soviet design, but I'm not sure. The wafer may be from Ukrainian manufacturing scrap. The die has a mysterious symbol that may indicate the manufacturer, but nobody could identify it. The chip's part number is К561ИЕ11. Soviet ICs have a rational numbering system. 61 indicates a clone of 4000-series CMOS. И is digital, while ИЕ is a counter. So you know from the part number that the chip is a CMOS counter. Here's a schematic of the chip from the Motorola datasheet. The four toggle flip-flops (red) count the 4 bits. To count up, toggle if a carry; toggle if a borrow to count down. The blue gates compute carry/borrow if all 1's or 0's below as appropriate, causing a toggle. 18/20 This diagram shows the chip with functional blocks labeled. The four bits are arranged roughly symmetrically. The toggle logic and carry-out logic are squeezed into available space. 19/20  @kenshirriff this reminded me of an old Zachtronics Flash game, "KOHCTPYKTOP: ENGINEER OF THE PEOPLE," which was all about putting together CMOS logic on a layered grid of pixels. I never made it very far in. |
NAND gates are similar but put the PMOS transistors in parallel and the NMOS transistors in series. 9/20