this has turned into a very challenging project!
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the data ready handshaking flag is getting cleared in the wrong spot. test1 is the flag, and the green M1 cursor shows that it is getting cleared even though DMA hasn't started i was using a version of the "dma running" signal that was latched on the falling edge of CMD, so it was possible to trigger this clear signal even when DMA wasn't actually in progress. after that change, it seems to be passing both the write and the read test loops. i'll run them a bit longer just to make sure. i will say that it's the perfect time of year to be running this huge logic analyzer. it puts out a lot of heat! |
after connecting the logic analyzer and bringing some internal signals out to pins, it suddenly decides to start working 😅