i was using a version of the "dma running" signal that was latched on the falling edge of CMD, so it was possible to trigger this clear signal even when DMA wasn't actually in progress.
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i was using a version of the "dma running" signal that was latched on the falling edge of CMD, so it was possible to trigger this clear signal even when DMA wasn't actually in progress. 2 comments
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after that change, it seems to be passing both the write and the read test loops. i'll run them a bit longer just to make sure.