Gregory's Serverwow, got four bytes to transfer successfully over DMA! not sure why it got stuck after that.
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 not sure why I always end up in front of a logic analyzer, but here we are.  The logic analyzer from the perspective of the PCB: https://www.youtube.com/watch?v=nYPX-QQR9Tg several issues. this first issue, during a host to device write, holds the arbitration bus too long. it should release immediately after the second arb/gnt pulse had a theory and it reproduces in simulation. the transfer request flag isn't getting cleared soon enough. la_dma_selected is what can clear this flag and it is changed on the falling edge of cmd, which is too late to catch the ARB/GNT pulse. yes, that solves the crashing problem. but data isn't getting transferred correctly, so I've got more work to do. weirdly enough, it works the second try!!! something on the host was prematurely turning off DMA. maybe a bug in difdiag. @tubetime it’s been so long since this experiment started I forget what you’re trying to do! so the interrupt_detected flag is supposed to be set in the irq14 handler, and it is *supposed* to be set only when DMA is done. but somehow interrupt_detected is set without the IRQ handler ever being called! then the DMA operation is broken down prematurely. using the logic analyzer, i proved that the irq14 handler never gets called. the only code that *ever* sets the interrupt_detected flag exists in this handler. it's declared as a volatile so it can't be cached in a register. I wrote the flag value out to an unused IO port, 0x4F, so I can see it on the logic analyzer. a neat trick! so i don't know how this flag is getting set. my hack is to preemptively clear the flag right before starting DMA, and so far, it seems to be working. i think this code was "working" with the real ESDI drive because that one uses burst mode DMA and it finishes up very quickly, before the irq14wait routine can exit early. decided to look at the real drive. and guess what--it's not using burst mode. the POS registers have it turned off by default. it's also slow to read the data from the spinning disk, so IBM must have figured that it wasn't really necessary.  @tubetime When you find yourself asking, "How did this ever work?" and it turns out the answer is "It didn't." now I'm reading up on accessing SD cards from the Teensy 4.1. looks like SdFat is the library? could it be so easy? @tubetime I've used that library before, yes it really is easy. You probably won't set any throughput records, but it was great for writing diagnostic logs that were later read back and uploaded. turns out it's easy but I had to reformat the SD card using the official sdcard.org utility. anyway, I've read the first sector from a real disk image! the BIOS runs faster than the DIFDIAG utility, and so it seems like it is hitting a timing problem that i didn't hit before. my drive code seems to randomly hang up and not respond correctly. it's occasionally getting a spurious end-of-interrupt command which is really odd and points to an issue with the mailboxes (again, sigh). but it's SO DARN CLOSE. it's transferring sectors from the IML region in the disk image. @tubetime What’s the end goal here, boot the laptop using a SD card that’s emulating a Micro Channel hard drive interface, via Teensy? @tubetime I know it’s not the point of your project, but didn’t this laptop have PCMCIA? Would one of these work as a boot drive? Digigear SD SDHC SDXC to PCMCIA PC Card, Adapter Supports, ATA Flash Memory https://a.co/d/agF7LO9 figured out one problem. the disk boot routines slam the drive with an ATN and the first command word in 5.5us. the Teensy code takes too long to see the ATN and clears the command register full flag, which drops the first word. oops. so it *almost* boots now. in fact it successfully loads the IML sectors from the hidden partition on the drive, and no longer throws an I999... error code! my drive doesn't implement this weird feature called pseudo RBAs--it's a way to artificially limit the maximum possible block address, presumably so they can hide the partition data. i suspect the BIOS checks this, so i'll have to implement it. ugh. that means i need to figure out this incomprehensible diagram. well, it's working well enough to run qbasic. right now the drive is read-only. i think i need to dig into the 01290200 cache error that has been coming up. i'm concerned that an issue with my DBA-ESDI card has caused it, but i'm not sure. looks like the cache is inside the CPU. i can't find any cache chips on the motherboard. see? no cache or memory chips. the larger devices are probably semicustom gate array parts that IBM was fond of using. doubt they contain any cache memory.  @tubetime looks like the error is generated by an NMI that gets tripped when the cache is being set up. could be a number of causes but in general it is an issue with the internal CPU cache. could also be this test of the DMA controller which is also included in the same set of tests and triggers the same error code, for some reason.   @tubetime Your recent posts make me believe you’re a time traveller - perhaps the great-great-grandson of an IBM engineer who as a child found an old notebook complaining about this problem your grandpa just couldn’t solve and that he was fired for and altered the arc of his life. You studied your whole life as an engineer for this moment to come back to today when the hardware was still available, fix the problem, then go back and help your grandpa. Let us know how it turns out. @amart not too far off! my grandfather worked there. i once reverse engineered a prototype floppy drive he worked on, and got it working again. https://twitter.com/TubeTimeUS/status/1617703291483467776 @tubetime how does that even work? After the first iteration isn't the refresh bit always set, so it's stuck in an infinite loop if it never IRQs? @SteveSyfuhs oh sorry REFRESH_BIT is a macro that grabs an IO port bit that toggles with the DRAM refresh signal every 15us. @tubetime @Netux it's a solid state hard drive replacement that I'm designing. EE but I do some digital stuff too @tubetime I implemented PS/2 DMA in an emulator good enough to get a Sound Blaster working a while ago and god help us all @luigithirty nice, you didn't even have to get burst mode working 😉  |
just ran the same test again and it transferred the whole sector over DMA!!
so at least read transfers are working partially. writes just hang the machine after transferring half a sector. it's probably time for the logic analyzer.