Gregory's ServerEach pin has a latch to store the output value, as well as a circuit to read incoming data. This diagram shows how that circuitry looks on the die, underneath the metal layer. These transistors are much larger than regular logic transistors.
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 This diagram shows the main functional blocks of the 8086. The address/data pins are along the edges. The address adder is in the upper left. Address and data values move across the various buses. Complicated bus control logic handles the memory accesses. To support the different types of address pins, four different circuits were required, more than I'd expect. The 8086 is full of special cases: The top 4 address pins also provide status, but one pin constantly updates while the others don't. The bottom 4 pins use an extra latch. For much more on the address/data pins, see my blog post: http://www.righto.com/2023/07/8086-pins.html @kenshirriff I understand Intel used to HATE adding extra pins to DIPs. Today's processors have more than 3k pins ... vorsprung durch technik! "This diagram shows the main functional blocks of the 8086." Your whole thread on this is so interesting! It numbs the mind to think that this was, what 1980? (vs Moores Law...) Thanks.  @lopta The 8085 and 8086 buses were pretty similar. I think Intel wanted to make migration to the 8086 easier. Of course there were some differences since the 8086 has a 20-bit address bus and the 8085 has a 16-bit bus. But they used the same concepts: INTR/INTA for interrupts, HOLD/HLDA for bus hold, similar T state timing, similar status bits, and so forth. @kenshirriff Thank you. I thought perhaps it helped engineers use (readily available?) 8085 support chips and adapt existing 8-bit boards to run 16-bit code (a bit like the 80386sx let you build an AT that could run 32-bit code), albeit more slowly. |
Although the 8086 had 16-bit registers, it created a larger 20-bit address space by breaking memory into segments. A special address adder computed the physical address from the segment and offset. These values moved through the chip over the internal AD and C buses.