Gregory's Server@danluu This is not really in the same category but you reminded me of the concept of weird IP workarounds. Are you familiar with ARM's workaround for Intel's AESNI patent? ARM's version broke aesdec (and aesenc) into two instructions instead of one and apparently that's enough to avoid infringement at the ISA level. But then their decoders just macro-op fuse each pair back into one macro-op equivalent to the Intel version. Almost reads like a comedy routine.
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2 comments
 @danluu Like with most such things I learned about both parts (the macro-op fusion and the patent infringement reason for splitting up the instructions) from @rygorous but I can't find any blog write-ups of the full story. The macro-op fusion part of the story is here: https://news.ycombinator.com/item?id=19329873 |
@pervognsen That's great. I didn't know about that! Vaguely reminds me of Lexra's attempt to work around the SGI / MIPS patent on unaligned loads and stores (come on!).
Unclear how that one would've been resolved in court since Lexra settled to avoid the risk of the lawsuit being resolved in court.