Gregory's ServerThis die photo shows the 64-kilobit Ramtron chip (FM24C64). The memory is partitioned into four rectangles, each holding 32768 tiny cubes of PZT. The chip is accessed serially (using I2C), so it only has eight pins; you can see the bond pads around the edges of the die.
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 To make a capacitor, each PZT cube has a platinum plate line underneath and a platinum plate contact on top. The plate lines are the shiny vertical white rectangles in this photo. At the bottom, large transistors drive the selected plate line positive or negative. To learn more about this FRAM chip, see my blog post: https://www.righto.com/2024/09/ramtron-ferroelectric-fram-die.html  @bitsavers There are multiple factors that limit the number of writes that FRAMs can handle: changes in crystal structure as Ti ions replace O, mobile ions collecting at grain boundaries, and something to do with 90º domains.  @kenshirriff @bitsavers it's not really infinite since the endurance was probably reached in Marc's DRO. The fram was used by the readout to give the illusion of an absolute scale, but I believe the integrated fram that failed was updated too often (maybe every scale tick).  |
Here's a closeup of the sense amplifiers. The signals from the capacitors are very small, so each bit is stored in two capacitors, one high and one low. This makes it easier to distinguish a 0 and a 1. The sense amplifier boosts these two signals to determine a 0 or a 1. (DRAMs use similar sense amplifiers to read bits.) Because reading an FRAM capacitor destroys its value, the sense amplifier's output is then written back to memory.