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Ken Shirriff

This die photo shows the 64-kilobit Ramtron chip (FM24C64). The memory is partitioned into four rectangles, each holding 32768 tiny cubes of PZT. The chip is accessed serially (using I2C), so it only has eight pins; you can see the bond pads around the edges of the die.

A die photo showing the main functional blocks of the chip. The memory itself is partitioned into four blocks. The word line decoders select the appropriate column for the address and the drivers generate the pulses on the word and plate lines. The signals from that column go to the sense amplifiers on the right, where the signals are converted to bits and written back to memory. On the left, the precharge circuitry charges the bit lines to a fixed voltage at the start of the memory cycle, while the decoders select the desired byte from the bit lines.
23 September at 18:56 | Open on oldbytes.space
8 comments
Ken Shirriff

Here's a closeup of the sense amplifiers. The signals from the capacitors are very small, so each bit is stored in two capacitors, one high and one low. This makes it easier to distinguish a 0 and a 1. The sense amplifier boosts these two signals to determine a 0 or a 1. (DRAMs use similar sense amplifiers to read bits.) Because reading an FRAM capacitor destroys its value, the sense amplifier's output is then written back to memory.

A closeup die photo showing rows of large transistors that form the sense amplifiers. A few storage capacitors are visible at the left.
23 September at 18:59 | Open on oldbytes.space
Ken Shirriff

To make a capacitor, each PZT cube has a platinum plate line underneath and a platinum plate contact on top. The plate lines are the shiny vertical white rectangles in this photo. At the bottom, large transistors drive the selected plate line positive or negative.

A closeup die photo showing some of the storage capacitors on top of the plate lines. Most of the photo is taken up by the large transistors connected to the plate lines.
23 September at 19:02 | Open on oldbytes.space
Ken Shirriff

Here's a closeup of the part number and Ramtron logo on the die.

Microscopic text on the die: FM24C64A Ramtron.
23 September at 19:03 | Open on oldbytes.space
Ken Shirriff

To learn more about this FRAM chip, see my blog post: righto.com/2024/09/ramtron-fer
Thanks to CurousMarc for supplying the chip.

23 September at 19:04 | Open on oldbytes.space
bitsavers.org

@kenshirriff

why do they have finite r/w lifetimes?

23 September at 19:23 | Open on oldbytes.space
Ken Shirriff

@bitsavers There are multiple factors that limit the number of writes that FRAMs can handle: changes in crystal structure as Ti ions replace O, mobile ions collecting at grain boundaries, and something to do with 90º domains.

23 September at 19:41 | Open on oldbytes.space
F4GRX Sébastien

@kenshirriff @bitsavers it's not really infinite since the endurance was probably reached in Marc's DRO. The fram was used by the readout to give the illusion of an absolute scale, but I believe the integrated fram that failed was updated too often (maybe every scale tick).

23 September at 19:53 | Open on chaos.social
gudenau

@kenshirriff Oh it's almost like microscopic core memory? Pretty neat stuff.

23 September at 19:40 | Open on fosstodon.org
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