@david_chisnall how quickly can you emulate CHERI on x86-64? (Does qemu support it for example?) If you compile your C code, or language bindings/runtime to a CHERI architecture could that act as a better valgrind/ASAN?
Probably not what you had in mind when designing the hardware, but might be a useful intermediate step until CHERI hardware is widely available.
@edwintorok There is a QEMU version for CHERI RISC-V. It’s not amazingly fast, because it needs to do a bunch of instructions for tagged memory and more to extract fields from capabilities and perform the relevant checks. It can’t support multicore emulation and preserve the security properties (at least, not with good performance) because CHERI relies of stores of pointers being atomic. This is east in hardware (operations are within a cache line and you get the required atomicity for free) but it is incredibly hard to emulate. This is the main reason for wanting to built it in hardware rather than as a virtual machine.
Memory Save WASM has roughly the same abstract machine as CHERI and has roughly a 100% perf overhead (things run half speed), whereas CHERI should be able to get close to 2% on an optimised microarchitecture.
@edwintorok There is a QEMU version for CHERI RISC-V. It’s not amazingly fast, because it needs to do a bunch of instructions for tagged memory and more to extract fields from capabilities and perform the relevant checks. It can’t support multicore emulation and preserve the security properties (at least, not with good performance) because CHERI relies of stores of pointers being atomic. This is east in hardware (operations are within a cache line and you get the required atomicity for free) but...