the chip pins are crimped. this is a huge pain even with the super nice desoldering tool (FR-301)
Top-level
the chip pins are crimped. this is a huge pain even with the super nice desoldering tool (FR-301) 24 comments
just clipping the leads of the chips using side cutters will make this much easier. they're just plain TTL anyway. the sockets are going to be trickier. i'm thinking i need a soldering iron tip that can hit all the pins at once. did a web search and the 5th result was MY OWN DANG TWEET from like 2 years ago, lol. i think i just "Fooned" myself. @tubetime @tubetime With as much de soldering that you do, I'm surprised you don't' already have one. routed (except for a few RAS and CAS lines). i also have the schematic, but it needs cleanup work. so this board looks like it does both XMS (extended memory) and EMS (expanded memory). expanded memory is banked and uses a 64K (iirc) window to access it. well crap, this board appears to be a clone of the Intel Above Board Plus 8 card. it sure looks the same! OK, here are the KiCad files. it's not really a fab-able design because there are still DRC errors, but at least the schematic is useful. @tubetime but has it ever been reverse engineered before…? That would be a bummer. But if not: success! @tubetime how do you go from PCB layout to schematic? When I did this, I ended up tracing the PCB in a CAD package, the writing a thing that analyzed the lines and spit out a netlist. I then learned that while many tools exist to convert schematics to netlists, I couldn’t find much to go the other way ‘round. @keelan i'm running a trace in layout, seeing where it goes, then creating the connectivity in the schematic and pushing it to layout to create the connection. @tubetime RSVP all those legless chips. May their logic live on in the schematic, and in your future clones of their board! |
removed the one PROM chip and, confirmed, it was a pain. the other chips will be easier though...