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Tube🌱Time

scanned and loaded into Kicad!
19 April at 21:32 | Open on mastodon.social
11 comments
Otte Homan

@tubetime with Stannum melting at 157 °C (100 Pi F), you *should* be able to just dunk the populated PCB into a deep fryer at 180 °C (356 F) and all the chips would just fall out?

19 April at 22:00 | Open on theblower.au
Tube🌱Time

routed (except for a few RAS and CAS lines). i also have the schematic, but it needs cleanup work.
20 April at 23:34 | Open on mastodon.social
Tube🌱Time

dumped the PROM. it seems to be part of the address decoding process or memory mapping.
21 April at 0:59 | Open on mastodon.social
Tube🌱Time

so this board looks like it does both XMS (extended memory) and EMS (expanded memory). expanded memory is banked and uses a 64K (iirc) window to access it.

21 April at 2:05 | Open on mastodon.social
William D. Jones replied to Tube🌱Time

@tubetime Ahhh, so it's like the AST RAMpage 286 :D!

21 April at 2:06 | Open on mastodon.social
Tube🌱Time replied to Tube🌱Time

well crap, this board appears to be a clone of the Intel Above Board Plus 8 card. it sure looks the same!
21 April at 2:06 | Open on mastodon.social
Tube🌱Time replied to Tube🌱Time

yeah sure looks identical. welp, now we know how it works, lol.
21 April at 2:11 | Open on mastodon.social
Tube🌱Time replied to Tube🌱Time

OK, here are the KiCad files. it's not really a fab-able design because there are still DRC errors, but at least the schematic is useful.

github.com/schlae/XebecAboveBo

21 April at 18:00 | Open on mastodon.social
root42 replied to Tube🌱Time

@tubetime but has it ever been reverse engineered before…? That would be a bummer. But if not: success!

21 April at 6:30 | Open on chaos.social
Keelan

@tubetime how do you go from PCB layout to schematic? When I did this, I ended up tracing the PCB in a CAD package, the writing a thing that analyzed the lines and spit out a netlist. I then learned that while many tools exist to convert schematics to netlists, I couldn’t find much to go the other way ‘round.

21 April at 3:27 | Open on mastodon.sdf.org
Tube🌱Time

@keelan i'm running a trace in layout, seeing where it goes, then creating the connectivity in the schematic and pushing it to layout to create the connection.

21 April at 3:42 | Open on mastodon.social
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