Gregory's Serverthe schematic is pretty simple. looks like it does the pin swizzle for the disk change signal, creates the READY signal the amiga needs, but then it does some clever stuff with the index pulse. additionally, it uses the two reserved pins and the unused drive select line presumably to plumb the rework wires.
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76 comments
 so presumably the way this works is that the two bodge wires hook into the clock signal from the controller chip to the spindle motor controller (pin 7 on this example). the motor controller derives the RPM from this signal, so the external PAL sneaks in an additional divide by 2 in order to half the RPM. not too shabby! updated schematic. now that i know what all the pins do, it'll be much easier to reverse engineer the PAL. i'll take a crack at that tomorrow. while that's running I'll put the board back together with a socket. ran the outputs of DuPAL through Espresso to get the logic equations. i'm making a few assumptions so this probably has errors.  @tubetime Doesn't this model of PAL (https://www.alldatasheet.com/datasheet-pdf/pdf/70181/LATTICE/GAL16V8.html) have latches on the outputs, some of which can feed back into the inputs of other latches' combinatorial logic? yeah these are wrong. i'm trying to dump it as a combinational 16L8 but i need to spend some time with the manual pin manipulation tool. the product terms depend on themselves in a bunch of places, creating flip flops. ok it's got this weird state machine which, as it turns out, is used to *clock out a drive type value* using the drive select line as a clock and the ready pin as a data output! yeah so that state machine clocks out 1010... continuously which corresponds with the ID value of AAAA AAAA; the Amiga interprets that as a high density drive.  @tubetime you're incredibly good at this I could probably do this, but nowhere near as quickly @whitequark thanks! i got a lot of practice with the Quadlink project which had ~10 GALs, some registered. there may have been a bad connection in the socket, i tried it again (also as a 16L8) and these equations look a lot better. i've started adding better net names. another thing that i like to do is take a bunch of extra time to *understand* each product term. that involves using boolean algebra and DeMorgan's theorem to manually rearrange the terms. here's the 2-bit counter that generates the drive ID code. it's a little asynchronous state machine. i just write up little notes like this as i figure things out. and i've simplified the equations and gotten rid of excess terms about as much as i can. i understand what all the outputs do now, including the ones used to store intermediate states and never used in the external circuit. the next step is to put the equations into either WinCUPL or galette so we can try writing them to a real PAL.  @tubetime How can I make galette less awful? It's currently extremely galasm-like, but if there are things I can do to make it nicer to use, I'm all ears. (The deficiencies are probably obvious, but I'm too used to galasm to notice.) @sgf ah thanks, I really appreciate your openness! I guess there are a couple of things: - better error messages. I had some underscores in term names and the error I got said "invalid character in line n" but didn't say what the invalid character actually was. - better docs. it's always a pain to write this stuff but it's super helpful for folks. - equation reduction is probably out of scope since palasm was meant to be a thin wrapper around the raw fuse map, but that would be cool. 😃 @tubetime I worked on some error messages last week, for unrelated reasons - PTAL at Github latest & I'll fix anything missing. Docs: I love writing docs, but don't know what people need, so let me know. Equation reduction is tempting. I was thinking of writing something like a cupl2pld stage so that the pld format remains WYSIWYG. It's lower priority than just making it more usable in its basic form, though. Thanks for the feedback. If GitHub issues work better for you, that's also good. first attempt at PAL equations in galette--umm--did not match the real thing at all. i'm swapping parts into the DuPAL to compare how they perform for the same inputs. UNFORTUNATELY i've discovered that DuPAL cannot differentiate between a tri-stated output and a low output, even though the hardware is capable of doing that. 😩 oh i should just tag the guy who wrote DuPAL. @hkz very useful tool, can i have this tiny feature added to DuPAL Peeper? basically when you do a read, toggle the SIPO_O_7-14 lines and see if PISO_I_1-8 change at all. if they do, then they are hi-z.  bam! that was amazingly fast. so it turns out the output pin here, O13, used to drive the READY pin, goes hi-z when the drive select line is high. this is as expected. interestingly, it's driven either high or low when the drive select is low and the PAL is clocking out the drive ID code (1010... meaning it is a high density drive). I think it's time to probe this device in circuit. I've attached the Saleae to most of the pins of the PAL. you can see the drive ID protocol here. first it pulses the motor enable (with a drive select) to reset the state machine. then you get a bunch of pulses to clock out the data on the ready output (D7) and this is what happens when you put a double density disk in the drive. so the drive ID gets read every time there is a disk change, and the adapter changes the drive type depending on the disk! ok wow a few minor tweaks to the galette PLD file and the crazy thing works! I still need to test it with the Teac drive but I've managed to replicate the PAL. the PAL code is not very complicated. i was able to remove a bunch of terms that `espresso` added (spuriously). i also made some minor improvements. now for the most difficult part: what should i call my clone of "The Real HD-Drive"?  @tubetime  the layout for the board is simple. i'm making minor changes so it fits better in the Sony drive.  @tubetime @RealGene yep, trouble is that i can't differentiate it from a regular logic high. one trick is to pull it to some other voltage and use a window comparator to detect it.  @tubetime I'm sorry to @ you like this, and I'm sorry if I already did and forgot, but I have some DEC 3100s and Sun 3/60s, and I'm terrible with electronics. I keep trying to do minor repairs or kits and I just ruin things. I'd really especially like to get PLAs from those dumped if possible since that's kind of a ticking timebomb. Do you know of anyone who does stuff like that for randos like me? And regardless, thank you for sharing the hacking that you do do. @scrottie I'm sorta doing it but on a very limited basis since it's a huge pain even with DuPAL. the Quadlink had ten of them and that was miserable. I don't know what to tell you. @tubetime I read that name, did some digging and _of course_ it's from an Italian guy ("du' pal"/"du' bal" is slang for "due palle" i.e. "two balls", an expression commonly used to express frustration for a boring/undesirable task 😬) |
soldered some wires to the rework wires to help figure out where they go.