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Tube🌞Time

still a few footprints to go, but it's easier to place vias now, and traces.

21 comments
Tube🌞Time

down to the last few traces. i'm using a multimeter to ohm out and discover what they are connected to.

you can also see the faint outline of traces on layer 2 (the board has four layers). i'll need to route those next.

Tube🌞Time replied to Tube🌞Time

it's actually going pretty well despite me not being able to see where the traces go exactly. since i have net connectivity it helps guide me.

Parkman29 replied to Tube🌞Time

@tubetime Net connectivity is truely awesome

Tube🌞Time replied to Tube🌞Time

layer 2 is basically done. i've even got some copper pours! all this from staring *through* the top copper layer.

Tube🌞Time replied to Tube🌞Time

layer 3 was sorta hard and easy. it is mostly a ground plane, but there are a few other copper pours. i've got 100% connected, but there are some mystery pours that are just wired in parallel with pours on the top or bottom layer.

Tube🌞Time replied to Tube🌞Time

not satisfied with layer 3, so i am going back over it with a new technique: on a user defined layer, i'm drawing lines ONLY where i see a visible plane cut in that layer. then i'm adding "S" on top of every via that has spoked connections to the copper on that layer.

Tube🌞Time replied to Tube🌞Time

ahh that makes more sense. there are a few higher current connections, but more importantly, there are cuts in the ground plane! this creates a star ground at the large highlighted pad near the middle. this is the negative battery terminal (but after the current sense resistor)

Tube🌞Time replied to Tube🌞Time

anyway, i could fix up a few footprints but this reverse engineering job is essentially completed. you can find the design files here: github.com/schlae/Thinkpad700C

Tube🌞Time replied to Tube🌞Time

i haven't reverse engineered many 4-layer boards, but i'm kinda amazed it worked out this well.

Arthur Elsenaar replied to Tube🌞Time

@tubetime Amazing job, would love to see a video on how exactly you go about it.

Tube🌞Time replied to Tube🌞Time

reassembled like a magic trick. the layout CAD was quite helpful for finding footprint locations.

Simon Frankau replied to Tube🌞Time

@tubetime That's amazing.

What's the quote? Ah, yes.

"Sometimes, magic is just someone spending more time on something than anyone else might reasonably expect." -- Teller

Jake replied to Tube🌞Time

@tubetime Wow. How in the world do you figure out the middle layers? It’s a good thing this one was only four - I think some modern PCBs are 12+ layers.

The aim is not to be able to re-make a PCB, but just to be able to debug one?

Tube🌞Time replied to Jake

@gogobonobo the thread explains how i did it. higher layer count boards require more invasive methods. but yes i wanted to be able to debug boards corroded by a leaking capacitor.

http :verified: replied to Tube🌞Time

@tubetime How did you get to these middle layers? I mean, you can measure some connections, but not get the layout exactly, unless you open it or have some 3d x-rays or something.

Tube🌞Time replied to http

@http i have a schematic (that i ohmed out) already, and i can see *part* of the traces on that layer. that and a process of logical deduction led me to an approximation of the original layer.

Ian Hanschen replied to Tube🌞Time

@tubetime does kicad have any way to see multiple layers side by side? Sometimes when I have components on both sides that overlap it gets difficult even when I’m changing layer visibility.

Zitruskeks replied to Tube🌞Time

@tubetime Ohming it out on that scale is impressive. I just did the same on a board with just 20 dip ics and even that was a long task.

Well, I guess it didn't help that the ohming was done remotely by a friend who was a few hundred miles away and had borrowed the card to clone while i was doing the KiCad part :)

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