Gregory's ServerThe Intel 8086 microprocessor was introduced in 1978 and led to the x86 architecture in use today. One of its obscure features is the "bus hold", allowing another device to temporarily take over communication with memory. This circuitry is in the upper left corner of the chip.🧵
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The Intel 8087 math coprocessor chip performed floating-point operations and trig. You could plug an 8087 into your IBM PC and do math up to 100 times faster than the 8086 processor. The 8087 chip couldn't talk to the 8086. Instead, it used "bus hold" to access memory directly. The bus hold feature is annoyingly complicated to reverse engineer because the 8086 has two hardware modes: minimum and maximum. Bus hold is probably too complicated to explain in a Mastodon thread but let's see what happens. In minimum mode, the 8086's signals are similar to the older 8080 processor. This made it easier for customers to migrate. Maximum mode provides complex, encoded control signals that support more functionality for multiprocessor or coprocessor systems. In minimum mode, the device requests the bus through the HOLD signal, and the 8086 acknowledges it with HLDA. Three flip-flops manage the request, letting it proceed when the 8086 is ready.  @kenshirriff I guess 8237 must only use the HOLD/HLDA lines. I'm not sure I even knew about the RQ/GT lines. @kenshirriff  @kenshirriff the amount of speedup was entirely depended which replacement calculations the program did without the 8087 - or the program might also have just stopped when the programmer decided the coprocessor to be mandatory @kenshirriff I seem to remember that a 486 was basically a 386 and a 387 in a single package. Would they still have used this behind the scenes ? @LuzrBum It's a bit complicated. For the 286, Intel abandoned the complicated request/grant scheme but kept HOLD/HLDA. More complex bus arbitration was moved to the 82289 bus controller chip. The 486 is more than just a 386 and a 387 packaged together. As far as bus arbitration, the 486 has the HOLD/HLDA pins to control the bus, but added BREQ (bus request) and BOFF (backoff). |
During a bus hold, the 8086 processor stops using the memory bus and electrically disconnects from the bus by going into "tri-state" mode. This lets an external device take control of the bus and access memory directly. This can be used for high-speed input/output (DMA).