Gregory's ServerMost 8086 instructions are implemented in microcode, a level of instructions below the familiar machine instructions. But before microcode can run, something called the Group Decode ROM categorizes instructions according to their structure, shown as colors below.
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 The Group Decode ROM takes 9 inputs (8 instruction bits + interrupt) and generates 15 outputs. It is structured like a Programmable Logic Array with two compact grids of NOR gates, making it about 7 times as dense as a regular ROM. This closeup of the 8086's die with the metal removed shows the underlying silicon and the polysilicon wiring. The "doping" pattern of the silicon controls whether or not each spot in the grid has a transistor, and thus specifies the data in the ROM. A big computer architecture debate of the 1980s was RISC vs CISC, arguing that building Reduced Instruction Set Computers was better than Complex Instruction Set Computers like the 8086. Most instruction sets since then are much easier to decode than x86, but x86 keeps going. To learn about the Group Decode ROM in excessive detail, see my blog post https://www.righto.com/2023/05/8086-processor-group-decode-rom.html I also have an interactive page to show which 8086 instructions generate particular Group Decode ROM outputs: https://righto.com/8086/groupRom.html  @kenshirriff Did you see GameBoy ROM extraction tutorial? https://github.com/travisgoodspeed/gbrom-tutorial @kenshirriff I think the RISC v. CISC discussion needs to revisited with a benefit of historical hindsight. There’s a lot to learned about what makes architectures successful. @RogerShepherd Seriously, I think that technical merit has very little to do with the success of a computer architecture. Business factors and luck are much more important.  @kenshirriff I keep hoping it might still die out in my lifetime! Apart from archeology, I remain not a fan of its limited set of registers with various strange restrictions on usage, and absurd 1-15 byte instruction encodings. It brings me no joy. I mean, under the hood, Intel processors are translating this mess to something completely different and have been since, what, the Pentium era?  @kenshirriff Still a firm believer in RISC. I think @imorital was the first person to explain it to me. |
The Group Decode ROM generates 15 signals indicating how to decode the instruction. For instance, can it run without microcode? Does it have bits specifying the argument size? Is it followed by an addressing (Mod R/M) byte? Then the processor executes the instruction.