@tanavit @kenshirriff So if a "register" contained 2**24-1 (all 1s) and then the program added 1 (overflowing), the register would see 24 different states (1 for each bit), and after the first cycle it would have appeared to have subtracted 1 bit, first setting the lowest bit to 0 while the remaining 23 bits were still set to 1. Do I have that right?

If that is the case, was the program written to include some check-pointing logic to avoid reading interstitial states after a power loss?