Gregory's ServerIntel started using standard cells with automated place and route software for the 386; designing the chip manually would have been too slow. One of the engineers working on this was Pat Gelsinger, who is now Intel's CEO. Maybe standard cells can make you a CEO too! 19/21
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 My earlier Twitter thread on standard cells in the 386: https://x.com/kenshirriff/status/1753840893281403373 21/21 @kenshirriff Thank you for posting on Mastodon; I will catch this on the blog. Twitter links are effectively useless unless you are a logged-in Twitter user (try it!) so consider preservation there-of nil  @kenshirriff By the time we dusted off the P54C to use as the heart of Larrabee/Knights/XeonPhi, the whole thing had been converted through about three different design languages. Also, Larrabee was one of the first/largest test projects for automated synthesis at Intel. Some of the SIMD stuff was still done by hand, but the P54C core was all automatic synthesis and doesn't look nearly as pretty. There were lots of teething problems! But it worked in the end. @TomF Interesting! Can you say more about the different design languages? Also, do you know why the chip was called the P54C? P5 makes sense for the Pentium but P54C seems random. @kenshirriff There's also P54CS and P54CQS, but I don't know what the letters mean, sorry - way before my time. The original P54C was done in Intel's in-house design language, which was then retired in the 90s I think. Fortunately the design had been ported to more modern design languages like VHDL or Verilog in the meantime, so then we took that version, ported it yet again to the absolutely newest language that Intel was using. |
It's hard to explain circuits in detail on Twitter, so if you want more details on the standard cells in the Pentium, see my blog post:
https://www.righto.com/2024/07/pentium-standard-cells.html 20/21