My verilog implementation of a #uxn CPU just executed its first program! It is incredibly basic (#01 #02 ADD BRK), but I am still quite happy that it works at all.

The CPU is a microprogrammed processor using a custom microcode format, that allows easy access to stack operations. Here is the microcode for the ADD instruction:

src -> a
src -> b
alu.add -> src

The microcode for LIT is slightly more complex:

@BRK keep byte
pc -> mem.addr
mem.8 -> src
pc -> a
one -> b
alu.add -> pc

#fpga

My verilog implementation of a #uxn CPU just executed its first program! It is incredibly basic (#01 #02 ADD BRK), but I am still quite happy that it works at all.

The CPU is a microprogrammed processor using a custom microcode format, that allows easy access to stack operations. Here is the microcode for the ADD instruction: